RapidIO Bridge

The Tsi721 converts from PCIe to RapidIO and vice versa and provides full line rate bridging at 20 Gbaud. Using the Tsi721 designers can develop heterogeneous systems that leverage the peer to peer networking performance of RapidIO while at the same time using multiprocessor clusters that may only be PCIe enabled. Using the Tsi721, applications that require large amounts of data transferred efficiently without processor involvement can be executed using the full line rate block DMA+Messaging engines of the Tsi721.

Learn more: IDT RapidIO Development Systems

Features

  • x4 PCIe V2.1 to x4 S-RIO V2.1
  • Single port: x4, x2 or x1 support
  • 1.25, 2.5, 3.125 and 5 Gbaud support
  • Multiple DMA and Messaging channels/engines each capable of supporting full 20 Gbaud I/O
  • 8Kbyte packet buffering per DMA and Messaging Channel
  • 20 Baud line rate performance for 64 byte or larger packets, max TLP payload 256 bytes, max block DMA 64 Mbyte
  • PCI Express non-transparent bridging for transaction mapping
  • Lane reversal
  • Automatic Polarity inversion for PCI Express
  • Typical power 2W
  • Reach Support: 60 cm over 2 connectors
  • 100, 125, 156.25 MHz S-RIO and PCIe Endpoint compatible clocking options
  • JTAG 1149.1 and 1149.6
  • 13x13 mm FCBGA
  • Industrial and Commercial options

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
TSI721A1-16GCLV Active HMG143 FCBGA 143 C Yes Tray
Availability
TSI721A1-16GILH Active HMH143 FCBGA 143 I No Tray
Availability
TSI721A1-16GILV Active HMG143 FCBGA 143 I Yes Tray
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
Tsi721 Datasheet Datasheet PDF 405 KB 4月 4, 2016
Tsi721 Device Errata Errata PDF 102 KB 10月 1, 2012
使用指南与说明
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Quick Start Guide Guide PDF 130 KB 4月 20, 2015
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Manual Manual - Eval Board PDF 1.20 MB 4月 20, 2015
Tsi721 User Manual Manual PDF 3.92 MB 7月 17, 2013
PCN / PDN
PCN# : A1706-01 Change in Bumping Location on Select Packages Product Change Notice PDF 32 KB 7月 9, 2017
PDN#: F-16-01 PRODUCT DISCONTINUANCE NOTICE FOR SELECT DEVICES Product Discontinuation Notice PDF 531 KB 3月 31, 2017
其它
Supercomputing at the Mobile Edge Overview Overview PDF 991 KB 2月 17, 2017
S-RIO Switch Feature Comparison Chart Product Brief PDF 50 KB 2月 16, 2016
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Schematic Schematic PDF 1.18 MB 4月 7, 2015
S-RIO Linux Support Miscellaneous PDF 12 KB 3月 25, 2015
Tsi721 Product Brief Product Brief PDF 941 KB 4月 18, 2012
Tsi721 Header File Miscellaneous H 221 KB 7月 4, 2011
RapidIO2 Switch Overview Portfolio Overview PDF 4.03 MB 2月 28, 2011
Tsi721 Pinlist and Ballmap Pinlist-Ballmap ZIP 127 KB 10月 28, 2010
软件与工具
Tsi721 IBIS Model - 3.3V Model - IBIS IBS 298 KB 3月 15, 2015
Tsi721 RapidFET 3_2_003 Module Software Tool ZIP 419 KB 12月 19, 2012
Tsi721 IBIS Model - 2.5V Model - IBIS IBS 290 KB 2月 21, 2012
Tsi721 BSDL Model Model - BSDL BSDL 22 KB 6月 16, 2011
Tsi721 Thermal Compact Model (Flotherm) FCBGA Detailed Model - Thermal ZIP 9 KB 3月 17, 2011
Tsi721 Thermal Compact Model (Flotherm) FCBGA 2R Model - Thermal ZIP 1 KB 3月 17, 2010

软件与工具

文档标题 他の言語 文档类型 文档格式 文件大小
Tsi721 IBIS Model - 3.3V Model - IBIS IBS 298 KB 3月 15, 2015
Tsi721 RapidFET 3_2_003 Module Software Tool ZIP 419 KB 12月 19, 2012
Tsi721 IBIS Model - 2.5V Model - IBIS IBS 290 KB 2月 21, 2012
Tsi721 BSDL Model Model - BSDL BSDL 22 KB 6月 16, 2011
Tsi721 Thermal Compact Model (Flotherm) FCBGA Detailed Model - Thermal ZIP 9 KB 3月 17, 2011
Tsi721 Thermal Compact Model (Flotherm) FCBGA 2R Model - Thermal ZIP 1 KB 3月 17, 2010

Evaluation Boards

Part Number Title 升序排列
TSI721-16GEBI PCIe2 to S-RIO2 Evaluation Board