The 8T49NS010 is a Clock Synthesizer and Fanout Buffer / Divider. When used with an external crystal, the 8T49NS010 generates high performance timing geared towards the communications and datacom markets, especially for applications demanding extremely low phase noise jitter, such as 10, 40 and 100GE.

The 8T49NS010 provides versatile frequency configurations and output formats and is optimized to deliver excellent phase noise performance. The device delivers an optimum combination of high clock frequency and low phase noise performance, combined with high power supply noise rejection.

Features

  • Ten differential outputs
  • Input operates in full differntial mode (LVPECL or LVDS) or single-ended LVCMOS mode
  • Supports output power down for power sensitive applications
  • Output frequency of 156.25 MHz, 312.5 MHz, 625 MHz or 1250 MHz
  • Sub-100 fs RMS phase noise @156.25 MHz (typical, 12 kHz - 20 MHz)
  • LVCMOS / LVTTL compatible I2C interface
  • Full 3.3 V supply voltage
  • -40 deg C to +85 deg C ambient operating temperature

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8T49NS010-156NLGI Obsolete NLG56P5 VFQFPN 56 I Yes Tray
Availability
8T49NS010-156NLGI8 Obsolete NLG56P5 VFQFPN 56 I Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
8T49NS010 Data Sheet Datasheet PDF 711 KB
使用指南与说明
FemtoNG Universal Frequency Translator Ordering Product Information Guide Manual - User Reference PDF 447 KB
Timing Solutions for Cavium Processor Designs Guide PDF 810 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-831 The Crystal Load curve Application Note PDF 308 KB
AN-846 Termination - LVDS Application Note PDF 50 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 44 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-839 RMS Phase Jitter Application Note PDF 149 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 50 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-832 Timing Budget and Accuracy Application Note PDF 48 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-801 Crystal-High Drive Level Application Note PDF 109 KB
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
Flexible Solutions for Fast Edge Rate and Low Phase Noise Requirements Overview PDF 154 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clocks for Xilinx Ultrascale FPGAs Technical Brief PDF 256 KB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB
IDT Clocks for Altera's Stratix V and Arria V/X FPGAs Technical Brief PDF 238 KB