NOTICE - The following device(s) are recommended alternatives:

The 8752 is a low voltage, low skew LVCMOS clock generator. With output frequencies up to 240MHz, the 8752 is targeted for high performance clock applcations. Along with a fully integrated PLL, the 8752 contains frequency configurable outputs and an external feedback input for regenerating clocks with "zero delay".

Dual clock inputs, CLK0 and CLK1, support redundant clock applications. The CLK_SEL input determines which reference clock is used. The output divider values of Bank A and B are controlled by the DIV_SELA0:1, and DIV_SELB0:1, respectively.

For test and system debug purposes, the PLL_SEL input allows the PLL to be bypassed. When HIGH, the MR/nOE input resets the internal dividers and forces the outputs to the high impedance state.

The low impedance LVCMOS outputs of the 8752 are designed to drive terminated transmission lines. The effective fanout of each output can be doubled by utilizing the ability of each output to drive two series terminated transmission lines.

Features

  • Fully integrated PLL
  • Eight LVCMOS outputs, 7Ω typical output impedance
  • Selectable LVCMOS CLK0 or CLK1 inputs for redundant clock applications
  • Input/Output frequency range: 18.33MHz to 240MHz at VCC = 3.3V ± 5%
  • VCO range: 220MHz to 480MHz
  • External feedback for "zero delay" clock regeneration
  • Cycle-to-cycle jitter: 75ps (maximum), (all outputs are the same frequency)
  • Output skew: 100ps (maximum)
  • Bank skew: 55ps (maximum)
  • Full 3.3V or 2.5V supply voltage
  • 0°C to 70°C ambient operating temperature
  • Available in lead-free RoHS-compliant package

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8752CYLF Obsolete PRG32 TQFP 32 C Yes Tray
Availability
8752CYLFT Obsolete PRG32 TQFP 32 C Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
8752 Datasheet Datasheet PDF 139 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PDN# : CQ-16-02 Quarter PDN for Declined Market Product Discontinuation Notice PDF 592 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB
PCN# : A1401-02 Alternate Copper Wire Assembly Site Product Change Notice PDF 36 KB
PCN# : TB1303-01 Change of Carrier Tape for TQFP-32, TQFP-48 Product Change Notice PDF 472 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

软件与工具

文档标题 他の言語 文档类型 文档格式 文件大小
8752 IBIS Model Model - IBIS ZIP 67 KB