The ICS670-03 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT’s proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-01, but with an increased maximum output frequency of 210 MHz. Part of IDT’s ClockBlocks family, the part’s zero delay feature means that the risingedge of the input clock aligns with the rising edges of the
outputs giving the appearance of no delay through the device. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin.
The ICS670-03 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to video. By allowing off-chip feedback paths, the ICS670-03 can eliminate the delay through other devices. The 15 different on-chip multipliers work in a variety of applications. For other multipliers, including functional multipliers, see the ICS527.

Features

  • Packaged in 16-pin SOIC
  • Pb (lead) free package, RoHS compliant
  • Clock inputs from 5 to 210 MHz (see page 2)
  • Patented PLL with low phase noise
  • Output clocks up to 210 MHz at 3.3V
  • 15 selectable on-chip multipliers
  • Power down mode available
  • Low phase noise: -124 dBc/Hz at 10 kHz
  • Output enable function tri-states outputs
  • Low jitter 15 ps one sigma
  • Advanced, low power, sub-micron CMOS process
  • Industrial temperature rated
  • Operating voltage of 3.3 V or 5 V

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
670M-03ILF Active DCG16 SOIC 16 I Yes Tube
Availability
670M-03ILFT Active DCG16 SOIC 16 I Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
ics67003 Datasheet PDF 201 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
System Applications and Design Guidelines with IDT’s Zero-Delay Buffers Application Note PDF 245 KB
PCN / PDN
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB
PCN# A-0607-06 MMT Thailand as Alternate Assembly Facility for PLCC, SOIC 150mil/300mil Product Change Notice PDF 223 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

软件与工具

文档标题 他の言語 文档类型 文档格式 文件大小
670-01 5.0V IBIS Model Model - IBIS ZIP 3 KB
670-01 3.3V IBIS Model Model - IBIS ZIP 3 KB