The 8V34S204 is a differential 1:4 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock/1PPS, 2kHz and 8kHz signal distribution. Controlled by the input modes election pin, the differential input stages accept both rectangular or sinusoidal signals. The 8V34S204 also provides level translated LVCMOS/LVTTL outputs which are copies of the individual differential inputs CLKA and CLKB. The propagation delay of the device is very low, providing a ideal solution for clock distribution circuits with tight phase alignment requirements. The multiplexer select pin (SEL) allows to select one out of two input signals, which is copied to the four differential outputs.

 

Features

  • Designed for 1PPS, 2kHz, 8kHz and 10MHz GPS clock signal distribution
  • High speed 1:4 LVDS fanout buffer
  • Four differential LVDS output pairs
  • 2:1 input multiplexer
  • Two selectable differential inputs accept LVDS and LVPECL signals
  • Accepts rectangular and sinusoidal input signals
  • Two input monitoring outputs (LVCMOS)
  • Max Output frequency: 250MHz
  • Additive phase jitter, RMS;
    12kHz to 20MHz: = 65fs at 156.25MHz (typical)
  • Part-to-part skew: 200ps (maximum)
  • Propagation delay (differential outputs): 350ps (typical)
  • Full 2.5V and 3.3V voltage supply
  • -40°C to 85°C ambient operating temperature
  • Lead-free 24-lead VFQFN (RoHS 6/6) packaging

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8V34S204NLGI Last Time Buy NLG24P1 VFQFPN 24 I Yes Tube
Availability
8V34S204NLGI8 Last Time Buy NLG24P1 VFQFPN 24 I Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
8V34S204 Datasheet Datasheet PDF 722 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PDN#: CQ-19-04 Product Discontinuance Notice Product Discontinuation Notice PDF 1010 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB