The 8P391208 is intended to take 1 or 2 reference clocks, select between them using a pin selection, and generate up to 8 outputs that are the same as the reference frequency. The 8P391208 supports two output banks, each with its own power supply. All outputs in one bank would generate the same output frequency, and each bank can be individually controlled for output type or output enable. The device can operate over the -40 to +85°C temperature range.

Features

  • Accepts input frequencies ranging from 1PPS (1Hz) to 700MHz (1GHz in 3.3V HCSL mode)
  • Two differential inputs support LVPECL, LVDS, LVHSTL, HCSL or LVCMOS reference clocks
  • Generates 8 differential or 16 LVCMOS outputs
  • Outputs arranged in two banks of four outputs each
  • Select pins control which input drives which of two output banks
  • Controlled by 3-level input pins that are 3.3V-tolerant for all core voltages
  • Output type may be selected from LVPECL, LVDS, HCSL or CML
  • Each bank supports a separate power supply of 3.3V, 2.5V or 1.8V
  • CML outputs support two different voltage swings
  • Individual output enables and output type selection supported
  • Output noise floor of –153dBc/Hz @ 156.25MHz
  • Core voltage supply of 3.3V, 2.5V or 1.8V
  • -40 to +85°C ambient operating temperature
  • Lead-free (RoHS 6) QFN-32 (5mm x 5mm) packaging

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Carrier Type Buy Sample
8P391208NLGI Active NLG32P1 VFQFPN 32 I Tray
Availability
8P391208NLGI8 Active NLG32P1 VFQFPN 32 I Reel
Availability
8P391208NLGI/W Active NLG32P1 VFQFPN 32 I Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
8P391208 Datasheet Datasheet PDF 913 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
RF Timing Family Product Overview Overview PDF 723 KB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB