The 83948I-147 is a low skew, 1-to-12 Differential-to-LVCMOS/LVTTL Fanout Buffer. The 83948I-147 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. The 83948I-147 is characterized at full 3.3V, full 2.5V or mixed 3.3V core/2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83948I-147 ideal for those clock distribution applications demanding well defined performance and repeatability.

Features

  • Twelve LVCMOS/LVTTL outputs
  • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input
  • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
  • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL
  • Output frequency: 350MHz
  • Additive phase jitter, RMS: 0.14ps (typical)
  • Output skew: 100ps (maximum), 3.3V±5%
  • Part-to-part skew: 1ns (maximum), 3.3V±5%
  • Operating supply modes:
    Core/Output
    3.3V/3.3V
    3.3V/2.5V
    2.5V/2.5V
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
83948AYI-147LF Active PRG32 TQFP 32 I Yes Tray
Availability
83948AYI-147LFT Active PRG32 TQFP 32 I Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
83948I-147 Datasheet Datasheet PDF 357 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB
PCN# : A1401-02 Alternate Copper Wire Assembly Site Product Change Notice PDF 36 KB
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 363 KB
PCN# : TB1303-01 Change of Carrier Tape for TQFP-32, TQFP-48 Product Change Notice PDF 472 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 209 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB

软件与工具

文档标题 他の言語 文档类型 文档格式 文件大小
83948i-147 IBIS Model Model - IBIS ZIP 25 KB