The 5PB1106 is a high-performance 1:6 LVCMOS clock buffer. It has best-in-class Additive Phase Jitter of 50 fsec RMS.
 
The 5PB1106 also supports an Output Enable function. It is available in 16-pin QFN and 14-pin TSSOP packages and can operate from a 1.8 V to 3.3 V supply.
 

Features

  • High performance 1:6 LVCMOS clock buffer
  • Very low pin-to-pin skew <50 ps
  • Very low additive jitter <50 fs
  • Supply voltage: 1.8 V to 3.3 V
  • fmax = 200 MHz
  • Integrated serial termination for 50ohm channel
  • Packaged in 14-pin TSSOP and small 16-pin QFN packages
  • Extended (-40°C to +105°C) temperature range

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Range Carrier Type Buy Sample
5PB1106CMGI Active CMG16 COL 16 -40 to 85°C Cut Tape
Availability
5PB1106CMGI8 Active CMG16 COL 16 -40 to 85°C Reel
Availability
5PB1106PGGI Active PGG14T1 TSSOP 14 -40 to 85°C Tube
Availability
5PB1106PGGI8 Active PGG14T1 TSSOP 14 -40 to 85°C Reel
Availability
5PB1106CMGK Active CMG16 COL 16 -40 to 105°C Cut Tape
Availability
5PB1106CMGK8 Active CMG16 COL 16 -40 to 105°C Reel
Availability
5PB1106PGGK Active PGG14T1 TSSOP 14 -40 to 105°C Tube
Availability
5PB1106PGGK8 Active PGG14T1 TSSOP 14 -40 to 105°C Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
5PB11xx Family Datasheet Datasheet PDF 549 KB
应用指南 &白皮书
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
PCN / PDN
PCN# : A1905-02 Adding Carsem, Malaysia as Alternate Assembly Location & Change Material Sets Product Change Notice PDF 268 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview Overview PDF 252 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

软件与工具

文档标题 他の言語 文档类型 文档格式 文件大小
5PB1106 IBIS Model Model - IBIS ZIP 30 KB