The 5P83908 is a high-performance, 1-to-8 crystal input to LVCMOS fanout buffer with output enable pins. This device accepts a fundamental mode crystal from 10 MHz to 40 MHz and outputs LVCMOS clocks with best-in-class phase noise performance.

The 5P83908 features a synchronous glitch-free Output Enable function to eliminate any intermediate incorrect output clock cycles when enabling or disabling outputs. It comes in standard TSSOP packages or small QFN packages and can operate from 1.8 V to 3.3 V supplies.

Features

  • Eight copies of LVCMOS output clocks with best-in-class phase noise performance
  • Phase Noise:
    Offset Noise Power (3.3 V)
    •      100 Hz: -131 dBc/Hz
    •      1 KHz: -145 dBc/Hz
    •      10 KHz: -154 dBc/Hz
    •      100 KHz: -161 dBc/Hz
  • Operating power supply modes:
    •      Full 3.3 V, 2.5 V, 1.8 V
    •      Mixed 3.3 V core / 2.5 V output operating supply
    •      Mixed 3.3 V core / 1.8 V output operating supply
    •      Mixed 2.5 V core / 1.8 V output operating supply
  • Crystal Oscillator Interface
  • Synchronous Output Enable
  • Packaged in 20-pin TSSOP and QFN packages
  • Extended temperature range (-40°C to +105°C) 

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5P83908PGGK Active PGG20 TSSOP 20 K Yes Tube
Availability
5P83908PGGK8 Active PGG20 TSSOP 20 K Yes Reel
Availability
5P83908NDGK Active NDG20P2 VFQFPN 20 K Yes Tray
Availability
5P83908NDGK8 Active NDG20P2 VFQFPN 20 K Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
5P8390x Datasheet Datasheet PDF 367 KB
应用指南 &白皮书
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview Overview PDF 252 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB