The 8SLVS1118 is a high-performance, low-power, differential 1:18 output fanout buffer. This highly versatile device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVS1118 ideal for clock distribution applications that demand well-defined performance and repeatability. The device is characterized to operate from a 2.5V or 3.3V power supply. The integrated bias voltage references enable easy interfacing AC-coupled signals to the device inputs.

Features

  • 1:18, low skew, low additive jitter LVPECL/LVDS fanout buffer 
  • Low power consumption 
  • Differential PCLK, nPCLK clock pair accepts the following differential/single-ended input levels: LVDS, LVPECL, and LVCMOS 
  • Maximum input clock frequency: 2GHz 
  • Propagation delay: 290ps (typical) 
  • Output skew: 40ps (typical) 
  • Low additive phase jitter, RMS: 39fs (typical)
  • Integration range: 12kHz–20MHz (fREF = 156.25MHz, VPP = 1V, VDD = 3.3V) 
  • Full 2.5V and 3.3V supply voltage modes 
  • Device current consumption:
    • 180mA (typical) IEE for LVPECL output mode
    • 400mA (typical) IDD for LVDS output mode 
  • 48-VFQFN, lead-free (RoHS 6) packaging 
  • Transistor count: 1762
  • -40°C to +85°C ambient operating temperature 
  • Supports case temperature up to 105°C

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8SLVS1118NLGI Active NLG48P1 VFQFPN 48 I Yes Tray
Availability
8SLVS1118NLGI/W Active NLG48P1 VFQFPN 48 I Yes Reel
Availability
8SLVS1118NLGI8 Active NLG48P1 VFQFPN 48 I Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
8SLVS1118 Datasheet Datasheet PDF 572 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
RF Timing Family Product Overview Overview PDF 723 KB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

软件与工具

文档标题 他の言語 文档类型 文档格式 文件大小
8SLVS1118 IBIS Model Model - IBIS ZIP 191 KB