The 8SLVP2104I is a high-performance differential dual LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP2104I is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVP2104I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and four low skew outputs are available. The integrated bias voltage reference enable easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

Features

  • Two 1:4, low skew, low additive jitter LVPECL output pairs
  • Two differential clock input pairs
  • Differential pairs can accept the following differential input levels: LVDS, LVPECL, CML
  • Maximum input clock frequency: 2GHz
  • Output skew: 8ps (typical)
  • Propagation delay: 270ps (maximum)
  • Low additive phase jitter, RMS: 47fs (maximum)
  • Full 3.3V and 2.5V supply voltage
  • Maximum device current consumption (IEE): 88mA (maximum)
  • Available in lead-free (RoHS 6), 28-Lead VFQFN package
  • -40°C to 85°C ambient operating temperature
  • Supports case temperature ≤105°C operations

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8SLVP2104ANBGI Active NBG28 VFQFPN 28 I Yes Tray
Availability
8SLVP2104ANBGI/W Active NBG28 VFQFPN 28 I Yes Reel
Availability
8SLVP2104ANBGI8 Active NBG28 VFQFPN 28 I Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
8SLVP2104 Datasheet Datasheet PDF 926 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
PCN# : N1406-01 Datasheet change Product Change Notice PDF 52 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
RF Timing Family Product Overview Overview PDF 723 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

软件与工具

文档标题 他の言語 文档类型 文档格式 文件大小
8SLVP2104I IBIS Model Model - IBIS ZIP 72 KB