The 8P34S2106 is a high-performance, low-power, differential dual 1:6 LVDS output 1.8V / 2.5V fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has six low-skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S2106 ideal for clock distribution applications demanding well-defined performance and repeatability. The device is characterized to operate from a 1.8V / 2.5V power supply. The integrated bias voltage references enable easy interfacing of AC-coupled signals to the device inputs.

Features

  • Dual 1:6 low skew, low additive jitter LVDS fanout buffers
  • Matched AC characteristics across both channels
  • High isolation between channels
  • Low power consumption
  • Both differential CLKA, nCLKA and CLKB, nCLKB inputs accept
    LVDS, LVPECL and single-ended LVCMOS levels
  • Maximum input clock frequency: 2GHz
  • Output amplitudes: 350mV, 500mV (selectable)
  • Output bank skew: 10ps typical
  • Output skew: 20ps typical
  • Low additive phase jitter, RMS: < 45fs typical,
    (fREF = 156.25MHz, 12kHz - 20MHz)
  • Full 1.8V and 2.5V supply voltage mode
  • Lead-free (RoHS 6), 40-lead VFQFN packaging
  • -40°C to 85°C (Tc ≤ 105°C) operating temperature range
 

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Tape Pin 1 Quad Pb (Lead) Free Carrier Type Buy Sample
8P34S2106NLGI Active NLG40P2 VFQFPN 40 I Yes Tray
Availability
8P34S2106NLGI/W Active NLG40P2 VFQFPN 40 I 2 Yes Reel
Availability
8P34S2106NLGI8 Active NLG40P2 VFQFPN 40 I 1 Yes Reel
Availability
8P34S2106AHGI Active AHG48 WLCSP 48 I 2 Yes Cut Tape
Availability
8P34S2106AHGI8 Active AHG48 WLCSP 48 I 2 Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
8P34S2106 Datasheet Datasheet PDF 519 KB
应用指南 &白皮书
AN-846 Termination - LVDS Application Note PDF 50 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
RF Timing Family Product Overview Overview PDF 723 KB
8P34S21xx-series 1.8V Dual RF Clock / Data Fanout Buffers Product Brief PDF 291 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB