The 9DBV0441 is a member of IDT's SOC-Friendly 1.8V Very-Low-Power (VLP) PCIe family. It has integrated output terminations providing Zo=100ohms for direct connection to 100ohm transmission lines. The device has 4 output enables for clock management, and 3 selectable SMBus addresses.

Features

  • Direct connection to 100ohm transmission lines; saves 16 resistors compared to standard HCSL outputs
  • 53mW typical power consumption in PLL mode; minimal power consumption
  • Spread Spectrum (SS) compatible; allows use of SS for EMI reduction
  • OE# pins: support DIF power management
  • HCSL compatible differential input: can be driven by common clock sources
  • Programmable slew rate for each output: allows tuning for various line lengths
  • Programmable output amplitude: allows tuning for various application environments
  • Pin/software selectable PLL bandwidth and PLL Bypass: minimize phase jitter for each application
  • Outputs blocked until PLL is locked: clean system start-up
  • Software selectable 50 MHz or 125 MHz PLL operation: useful for Ethernet Applications
  • Configuration can be accomplished with strapping pins: SMBus interface not required for device control
  • 3.3 V tolerant SMBus interface works with legacy controllers
  • Space-saving 5x5 mm 32-pin VFQFPN: minimal board space
  • Selectable SMBus addresses: multiple devices can easily share an SMBus segment

Product Options

下单器件 ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9DBV0441AKILF Active NLG32P1 VFQFPN 32 I Yes Tray
Availability
9DBV0441AKILFT Active NLG32P1 VFQFPN 32 I Yes Reel
Availability
9DBV0441AKLF Active NLG32P1 VFQFPN 32 C Yes Tray
Availability
9DBV0441AKLFT Active NLG32P1 VFQFPN 32 C Yes Reel
Availability

技术资料

文档标题 他の言語 文档类型 文档格式 文件大小
数据手册与勘误表
9DBV0441 Datasheet Datasheet PDF 206 KB
应用指南 &白皮书
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
其它
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB
9DBV0441 Reference Schematic Schematic PDF 72 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB

软件与工具

文档标题 他の言語 文档类型 文档格式 文件大小
9DBV0441 IBIS Model Model - IBIS ZIP 70 KB